1. Field of the Invention
The invention relates in general to a signal receiving interface, and more particularly to a circuit structure of a multi-lane serial link signal receiving interface.
2. Description of the Related Art
With the constant progress of electronic technologies, display apparatuses of all diversities are becoming more and more popular. Various kinds of electronic devices, such as television systems, computer systems, projectors, digital cameras, disk players, mobile phones and game consoles, all need a high data rate and quality video/audio transmission interface. DisplayPort (DP) is one of the latest multimedia receiving interfaces.
FIG. 1 shows a front-end function block of a DP receiving circuit. As shown in FIG. 1, four pairs of differential image data signals Data#0, Data#1, Data#2 and Data#3 are inputted into a DP receiver, and are respectively provided to analog front-end circuits 110A to 110D. Signals having been preliminarily processed by the analog front-end circuits 110A to 110D are respectively provided to analog clock data recovery (ACDR) circuits 120A to 120D for clock data recovery, and then to demultiplexers 130A to 130D for demultiplexing.
In addition to the DP interface, there are several types of multi-lane serial link signal receiving interfaces, e.g., Serial Advanced Technology Attachment (SATA) and Peripheral Component Interconnect Express (PCIE), which also adopt the circuit structure similar to that in FIG. 1. Known to one person skilled in the art, as an ACDR circuit has a large chip area and high power, an overall size and power consumption of such signal receiving system are correspondingly increased.